Stiffener design

6825066
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Inventors

Ranade, Yogendra
Govind, Anand
Nagarajan, Kumar
Ghahghahi, Farshad
Thurairajaratnam, Aritharan

Application #

308310

Filed

Dec-3-2002

Published

Nov-30-2004

Current US Class

257/701
257/702
257/704
257/706
438/106
438/107
438/108
438/121
438/125
438/613

International Classes

H01L 021/44

Field of Search

438/121 438/125 438/106 438/107 438/613 438/108 257/706 257/701 257/702 257/704

Assignee

LSI Logic Corporation (Milpitas, CA)

Examiners

Smith; Matthew

Attorney, Agent or Firm

Luedeka, Neely & Graham, P.C.

US Patent References

5866943   System and method...
5882459   Method for alignin...

Referenced by:

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Citation

Cite This Patent

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Abstract
A stiffener for reinforcing a package integrated circuit. The stiffener includes a rigid planar element having a first surface for bonding to a package substrate. The rigid planar element forms a major interior aperture for receiving and surrounding an integrated circuit on all sides of the integrated circuit. The rigid planar element also forms a minor interior aperture for receiving and surrounding a secondary circuit structure on at least three sides of the secondary circuit structure. In this manner, the stiffener provides structural support to the integrated circuit package, which reduces and preferably eliminates twisting and warping of the substrate package as it heats and is subjected to other stresses. Because the major interior apertures does not need to be large enough to fit both the monolithic integrated circuit and the secondary circuit structure, there is more stiffener material available to provide structural support than there would be if the major interior aperture was large enough to fit both the monolithic integrated circuit and the secondary circuit structure.
 
Claims
What is claimed is:

1. A stiffener for reinforcing a package integrated circuit, the stiffener comprising:

a rigid, planar, wholly electrically conductive element having a first surface for bonding to a package substrate,

the rigid planar element forming a major interior aperture extending completely through the rigid planar element, for receiving and surrounding an integrated circuit on all sides of the integrated circuit, and

the rigid planar element forming a minor interior aperture extending completely through the rigid planar element, for receiving and surrounding a secondary circuit structure on at least three sides of the secondary circuit structure.

2. The stiffener of claim 1, wherein the rigid planar element forms a plurality of minor interior apertures for receiving and surrounding a plurality of secondary circuit structures on at least three sides of each of the secondary circuit structures.



Description
FIELD

This invention relates to the field of integrated circuit fabrication. More particularly, this invention relates to integrated circuit packaging materials.

BACKGROUND

Integrated circuits are preferably packaged prior to use, to protect the integrated circuit and to more easily provide for electrical connections between the integrated circuit and the external portions of the circuit in which the integrated circuit is to be used. While the packaging materials provide these valuable function, they also tend to create other problems, which should be identified and overcome to enhance the longevity of the integrated circuit.

For example, many packaging materials tend to have relatively low thermal conductivities. When the integrated circuit is operating, thermal energy is developed by electron motion in different parts of the monolithic integrated circuit. Because the packaging materials tend to be inefficient in dissipating the thermal energy, it tends to be expressed as an increase in temperature in various parts of the integrated circuit, which localized temperature increases are typically referred to as hot spots.
 
  A contiguous gasket provides an electromagnetic and environmental seal between the base and lid of a microcircuit housing. The base has a flat surface...  Methods and structures for die packages are described. The die package includes an integrated circuit die connected to and elevated above a substrate....