Dry etching method

5376234
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Inventors

Yanagida, Toshiharu

Application #

078928

Filed

Jun-21-1993

Published

Dec-27-1994

Current US Class

216/37
257/E21.252
438/695
438/702
438/723
438/724

International Classes

H01L 021/00

Field of Search

156/643 156/646 156/652 156/653 156/664 156/662 437/228

Assignee

Sony Corporation (Tokyo, JP)

Examiners

Breneman; R. Bruce

Attorney, Agent or Firm

Hill, Steadman & Simpson

Referenced by:

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Citation

Cite This Patent

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Abstract
A dry etching method wherein one compound selected from mercaptan, thioether and disulfide each having a fluorocarbon side chain is used as a main component of an etching gas. These compounds may form CF.sub.x.sup.+ and S on dissociation due to electric discharges, and contribute to high-rate etching and surface protection of a wafer. If a halogen compound such as CO, SOF.sub.2 or NOF is added to the etching gas, a high-rate etching reaction due to extraction of O atoms from SiO.sub.2 and structural reinforcement of carbonaceous polymer become possible. Also, S.sub.2 F.sub.2 may be added for reinforcing deposition of S. These effects lead to a reduction of the deposit amount of polymer necessary for highly selective processing, and contribute greatly to low pollution in a process.
 
Claims
What is claimed is:

1. A plasma etching method for etching a silicon compound layer, comprising the steps of:

providing a patterned masking material over the silicon compound layer to expose the areas of the silicon compound layer to be etched; and

etching the exposed silicon compound layer using an etching gas comprising at least one sulfur-containing compound selected from the group consisting of mercaptan having a fluorocarbon side chain, thioether having a fluorocarbon side chain, and disulfide having fluorocarbon side chain.

2. The plasma etching method as claimed in claim 1, wherein said silicon compound layer is selected from the group consisting of a silicon oxide based material layer and a silicon nitride based material layer.



Description
BACKGROUND OF THE INVENTION

(1) Field of the Invention

The present invention relates to a dry etching method applied in the manufacturing field of semiconductor devices, and particularly to a dry etching method for etching a silicon compound layer whereby high selectivity, high etchrate, low damage and low pollution can be achieved in processing a minute contact hole.

(2) Description of the Related Art

As large-scale integration and high performance of semiconductor devices as seen in recent VLSI have proceeded, higher processing precision is required for dry etching of a silicon compound layer represented by silicon oxide (SiO.sub.2).

First, the enlargement of the area of the device chip due to large-scale integration has increased the size of the wafer. Uniform processing within the wafer surface due to high minuteness of the pattern to be formed is required. Also, multiple-kind small-quantity production as represented by ASIC is required. On the basis of these backgrounds, the main stream of dry etching has been shifting from the traditional batch processing toward the single wafer processing. In this case, for maintaining productivity equal to that achieved in the past, the etchrate per wafer must be improved significantly.
 
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