Semiconductor device

6794747
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Inventors

Takehara, Hideki
Kanazawa, Kunihiko
Yoshikawa, Noriyuki

Application #

648697

Filed

Aug-26-2003

Published

Sep-21-2004

Current US Class

257/701
257/705
257/723

International Classes

H01L 023/15

Field of Search

257/700 257/701 257/675 257/685 257/723 257/705

Assignee

Matsushita Electric Industrial Co., Ltd. (Osaka, JP)

Examiners

Potter; Roy

Attorney, Agent or Firm

Merchant & Gould P.C.

US Patent References

6072122   Multi-chip packagi...
6114413   Thermally conducti...
6320543   Microwave and mil...
6630727   Modularly expand...

Referenced by:

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Citation

Cite This Patent

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Abstract
The present invention provides a semiconductor device comprising as a core substrate a high thermo conductive ceramic substrate having circuit patterns on opposed surfaces. The high thermo conductive ceramic substrate has on one surface a first circuit board of at least one layer having a first cavity structure, and on the other surface a second circuit board of at least one layer having a second cavity structure. A first active element is mounted on the circuit pattern on the high thermo conductive ceramic substrate within the first cavity, a second active element is mounted on the circuit pattern on the high thermo conductive ceramic substrate within the second cavity, an external electrode is integrated with the surface of the second circuit board, and the first circuit board surface is equipped with a cap or sealed with resin. A heat dissipation via is formed on the second circuit board, the high thermo conductive ceramic substrate and the external electrode on the surface of the second circuit board are connected thermally to each other, and heat of at least one active element selected from the first active element and the second active element is dissipated outward through the high thermo conductive ceramic substrate, the heat dissipation via and the external electrode on the surface of the second circuit board. The semiconductor device is downsized while securing transverse strength and heat dissipation characteristics of a heat-generating semiconductor element.
 
Claims
What is claimed is:

1. A semiconductor device comprising:

as a core substrate of a high thermo conductive ceramic substrate having circuit patterns on opposed surfaces,

the high thermo conductive ceramic substrate having on one surface a first circuit board of at least one layer having a first cavity structure, and on the other surface a second circuit board of at least one layer having a second cavity structure;

a first active element mounted on the circuit pattern on the high thermo conductive ceramic substrate within the first cavity;

a second active element mounted on the circuit pattern on the high thermo conductive ceramic substrate within the second cavity; and



Description
FIELD OF THE INVENTION

The present invention relates to a semiconductor device formed by packaging on a laminated substrate a semiconductor element and an electronic component as a peripheral circuit. More specifically, the present invention relates to a module structure.

BACKGROUND OF THE INVENTION

Recently proposed semiconductor devices are applied to transmission amplifiers used in portable phones or the like, and such semiconductor devices have a multilayer substrate on which an amplifying high-frequency power semiconductor element and a chip component for forming a matching circuit are provided (see, for example, JP 10(1998)-37054A, JP 2000-216307A, and JP 2002-9225A). A conventional semiconductor device will be described below by referring to FIG. 11. In FIG. 11, numeral 1 denotes a high-frequency power semiconductor element, 2 denotes an alumina substrate or a ceramic multilayer substrate such as a low temperature cofired ceramic hereinafter, referred to as LTCC) substrate. Each numeral 3 denotes a chip component such as a chip capacitor, a chip resistor or a chip inductor. Numerals 4, 5, 6, 7, and 8 denote respectively an external connection electrode, a metal wire, a connection pad at a cavity step, a potting resin, and a metal cap. A component-packaging land and a circuit pattern are formed by screen-printing on the surface of the ceramic multilayer substrate. The high-frequency power semiconductor element 1 is mounted within a cavity 12 on the back face of the ceramic multilayer substrate 2, electrically connected by the metal wire 5 to the connection pad 6 at the cavity step, and sealed with the metal wire 5 by the potting resin 7 for the purpose of protection. The chip components 3 are packaged as well at predetermined positions by a solder 15. On the ceramic multilayer substrate 2, the metal cap 8 is attached as a case. Furthermore, the external connection electrode 4 on the back face of the ceramic multilayer substrate 2 is electrically connected through a via hole 27 penetrating the ceramic multilayer substrate 2 to an inner layer pattern formed among layers of the substrate and the connection pad 6, and also to the component-packaging land.
 
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