Pattern Measurement method

4910398
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Inventors

Komatsu, Fumio
Okumura, Katsuya

Application #

257862

Filed

Oct-14-1988

Published

Mar-20-1990

Current US Class

250/307
250/310
356/601
382/286

International Classes

H01J 031/28

Field of Search

250/307 250/310 382/22 356/376

Assignee

Kabushiki Kaisha Toshiba (Kawasaki, JP)

Examiners

Berman; Jack I.

Attorney, Agent or Firm

Foley & Lardner, Schwartz, Jeffery, Schwaab, Mack, Blumenthal & Evans

US Patent References

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Citation

Cite This Patent

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Abstract
This method is a method of measuring a taper angle, a thickness or a depth of a semiconductor integrated circuit pattern. Electron beam, light beam or the like is irradiated to a semiconductor integrated circuit pattern provided on a reference plane, thus to form a projected image. The projected image forms a predetermined angle with respect to a reference line set with respect to the reference plane. Then, lengths in a direction of the reference line of the projected images of symmetrical side walls of the pattern are measured to calculate from the ratio of those lengths and angle that the side walls and the reference plane form.
 
Claims
We claim:

1. A method of measuring a pattern having first and second side walls which are uneven with respect to a reference plane and are plane-symmetrical with each other with respect to a plane of symmetry raised vertical to said reference plane, said method comprising the steps of:

obtaining a projected image of a pattern onto a plane of projection which forms a predetermined angle .theta. with respect to said reference plane;

defining a reference line which is a straight line orthogonal to an intersecting line of said plane of symmetry and said plane of projection, and included in said plane of projection to obtain a width x.sub.1 in a direction of said reference line of a projected image of said first side wall and a width x.sub.2 in the direction of said reference line of a projected image of said second side wall; and



Description
BACKGROUND OF THE INVENTION

1. Field of the Art

This invention relates to a pattern measurement method, and more particularly to a pattern measurement method for measuring a taper angle, a thickness or a depth of a semiconductor integrated circuit pattern.

2. Prior Art

In the manufacturing process of semiconductor integrated circuits, there occurs a need to measure a taper angle, a thickness or a depth for various patterns formed on the semiconductor substrate. Ordinarily known conventional methods for measuring such a fine pattern are as follows.

(1) Method of cleaving a sample to observe its cross section by a scanning electron microscope.

(2) Method of vacuum-depositing gold onto a sample to irradiate an electron beam thereto to use a scanning electron microscope provided with a pair of electron detectors arranged symmetrically with respect to the electron beam, thus to conduct a signal processing, e.g., calculation of sum of signals obtained by a pair of detectors and difference therebetween, etc.
 
  There is disclosed herein an integrated scanning tunneling microscope and an integrated piezoelectric transducer and methods for making both. The device...  An ion gun for producing a pulsed microfocused beam of ions comprises an ion source arranged to produce a continuous ion beam along a z-axis toward a collector...