Multi-chamber integrated process system

4951601
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Inventors

Maydan, Dan
Somekh, Sasson
Wang, David N.
Cheng, David
Toshima, Masato
Harari, Isaac
Hoppe, Peter D.

Application #

371700

Filed

Jun-23-1989

Published

Aug-28-1990

Current US Class

118/715
118/719
118/729
204/298.25
414/217
414/935
414/937
414/939

International Classes

C23C 016/00

Field of Search

118/715 118/719 118/729 414/217 204/298 204/298 156/345

Assignee

Applied Materials, Inc. (Santa Clara, CA)

Examiners

Bueker; Richard

Attorney, Agent or Firm

Dalton; Philip A.

US Patent References

4405435   Apparatus for perfo...
4501527   Device for automati...
4553069   Wafer holding app...
4592306   Apparatus for the d...
4715921   Quad processor

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Abstract
An integrated modular multiple chamber vacuum processing system is disclosed. The system includes a load lock, may include an external cassette elevator, and an internal load lock wafer elevator, and also includes stations about the periphery of the load lock for connecting one, two or several vacuum process chambers to the load lock chamber. A robot is mounted within the load lock and utilizes a concentric shaft drive system connected to an end effector via a dual four-bar link mechanism for imparting selected R-.theta. movement to the blade to load and unload wafers at the external elevator, internal elevator and individual process chambers. The system is uniquely adapted for enabling various types of IC processing including etch, deposition, sputtering and rapid thermal annealing chambers, thereby providing the opportunity for multiple step, sequential processing using different processes.
 
Claims
Having thus described preferred and alternative embodiments of our multiple chamber integrated process system, what is claimed is:

1. An integrated vacuum processing system for workpieces such as semiconductor wafers, comprising:

a vacuum load lock chamber, having a closable entrance;

at least one vacuum processing chamber mounted to said load lock chamber and communicating therewith via openings in the adjacent chambers;

each of said processing chambers including a wafer support means and being adapted for performing a process selected from at least one of gas chemistry etching, gas chemistry deposition, physical sputtering and rapid annealing on at least one wafer positioned on the support and, further including means for reversibly moving a wafer along an axis from a selected internal position adjacent the wafer support means to and onto the wafer support means; and



Description
BACKGROUND OF THE INVENTION

The present invention relates to a multiple chamber silicon wafer VLSI processing system that includes a common load lock and wafer exchange robot and multiple process chambers suitable for sequentially and simultaneously performing different process steps such as deposition and/or dry etching of dielectric, semiconductor and conductor layers. The invention also relates to apparatus for performing multiple integrated processing steps in a continuous sequence, that is, by routing semiconductor wafers between different processing chambers while the system is closed and under vacuum.

Presently, the typical available VLSI processing reactor systems are single chamber batch-type systems in which the chamber is dedicated to a single type of process such as plasma etching or chemical vapor deposition. These process-dedicated batch-type reactor chambers are designed to provide a high processing throughput for a single process step such as, for example, the chemical vapor deposition of silicon or silicon dioxide or other dielectric or the etching of such layers.
 
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