Multiple chamber integrated process system

5882165
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Inventors

Maydan, Dan
Somekh, Sasson
Wang, David Nin-Kou
Cheng, David
Toshima, Masato
Harari, Isaac
Hoppe, Peter D.

Application #

926568

Filed

Sep-10-1997

Published

Mar-16-1999

Current US Class

118/719
414/217
414/331.14

International Classes

C23C 016/00

Field of Search

414/217 414/331 414/222 414/937 414/939 118/719

Assignee

Applied Materials, Inc. (Santa Clara, CA)

Examiners

Brahan; Thomas J.

Attorney, Agent or Firm

Kenyon & Kenyon

US Patent References

4405435   Apparatus for perfo...
4477311   Process and appar...
4501527   Device for automati...
4547247   Plasma reactor ch...
4553069   Wafer holding app...
4584045   Apparatus for conv...
4592306   Apparatus for the d...
4624728   Pin lift plasma pro...
4705951   Wafer processing s...
4722298   Modular processin...
5096364   Wafer arm handler...

Referenced by:

View Backward References

Other References

IBM Technical Disclosure Bulletin vol. 20 No. 1, Jun. 1986 "Vacuum-Compatible Wafer Handler".

Citation

Cite This Patent

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Abstract
An integrated modular multiple chamber vacuum processing system is disclosed. The system includes a load lock, may include an external cassette elevator, and an internal load lock wafer elevator, and also includes stations about the periphery of the load lock for connecting one, two or several vacuum process chambers to the load lock chamber. A robot is mounted within the load lock and utilizes a concentric shaft drive system connected to an end effector via a dual four-bar link mechanism for imparting selected R--.THETA. movement to the blade to load and unload wafers at the external elevator, internal elevator and individual process chambers. The system is uniquely adapted for enabling various types of IC processing including etch, deposition, sputtering and rapid thermal annealing chambers, thereby providing the opportunity for multiple step, sequential processing using different processes.
 
Claims
Having thus described preferred and alternative embodiments of our multiple chamber integrated process system, what is claimed is:

1. An integrated workpiece vacuum processing system comprising:

a vacuum transfer chamber having a closable entrance;

a first vacuum processing chamber mounted to said transfer chamber and communicating therewith by means of an opening in said processing chamber, said first processing chamber adapted to perform a process selected from the group consisting of chemical vapor deposition, etching, heat treatment and sputtering on a workpiece, said first processing chamber fitted with a workpiece support;

a second vacuum processing chamber mounted to said transfer chamber and communicating therewith by means of an opening in said second processing chamber, said second processing chamber adapted to perform a process selected from the group consisting of chemical vapor deposition, etching, heat treatment and sputtering on a workpiece, said second processing chamber fitted with a workpiece support and performing a different process than said first chamber;



Description
BACKGROUND OF THE INVENTION

the present invention related to a multiple chamber silicon wafer VLSI processing system that includes a common load lock and wafer exchange robot and multiple process chambers suitable for sequentially and simultaneously performing different process steps such as deposition and/or dry etching of dielectric, semiconductor and conductor layers. The invention also relates to apparatus for performing multiple integrated processing steps in a continuous sequence, that is, by routing semiconductor wafers between different processing chambers while the system is closed and under vacuum.

Presently, the typical available VLSI processing reactor systems are single chamber batch-type systems in which the chamber is dedicated to a single type of process such as plasma etching or chemical vapor deposition. These process-dedicated batch-type reactor chambers are designed to provide a high processing throughput for a single process step such as, for example, the chemical vapor deposition of silicon or silicon dioxide or other dielectric or the etching of such layers.
 
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