Semiconductor processing system

6540869
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Inventors

Saeki, Hiroaki
Taniyama, Yasushi

Application #

870495

Filed

Jun-1-2001

Published

Apr-1-2003

Current US Class

118/719
156/345.31
156/345.32
414/217
414/939

International Classes

C23F 001/00; H01L 021/306

Field of Search

118/719 414/217 414/939 156/345.31 156/345.32

Assignee

Tokyo Electron Limited (Tokyo, JP); Shinko Electric Co., Ltd. (Tokyo, JP)

Examiners

Mills; Gregory

Attorney, Agent or Firm

Oblon, Spivak, McClelland, Maier & Neustadt, P.C.

US Patent References

4547247   Plasma reactor ch...
4825808   Substrate processin...
4927484   Reactive ion etchin...
4941429   Semiconductor waf...
5417537   Wafer transport dev...
5671764   Washing apparatu...
5700127   Substrate processin...
6215897   Automated substrat...
6270619   Treatment device, l...

Referenced by:

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Citation

Cite This Patent

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Abstract
A semiconductor processing system comprises a first vacuum processing unit and a second vacuum processing unit connected thereto. The first and second vacuum processing units respectively comprise I/O transfer chambers. Casings of the transfer chambers are connected to each other, and a common transfer robot is arranged in the casings. The transfer robot is moved along horizontal guide rails and formed by connecting rails of the transfer chambers. A rail adjusting mechanism is provided to obtain linearity of the horizontal rails.
 
Claims
What is claimed is:

1. A semiconductor processing system comprising:

a first transfer chamber including a first casing having a plurality of ports which allow passage of a target substrate;

a first vacuum processing section connected to the first transfer chamber and having a first vacuum processing chamber configured to process the substrate in a vacuum atmosphere;

a first load port device, connected to the first transfer chamber, and configured to assist transfer of the substrate between the semiconductor processing system and a position outside the system;

a second transfer chamber detachably connected to the first transfer chamber and including a second casing having a plurality of ports which allow passage of the substrate, the second transfer chamber containing an internal atmosphere substantially in common with the first transfer chamber;



Description
CROSS-REFERENCE TO RELATED APPLICATIONS

This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-165432, filed Jun. 2, 2000, the entire contents of which are incorporated herein by reference.

BACKGROUND OF THE INVENTION

The present invention relates to a semiconductor processing system, and more particularly to a structural improvement for connecting an additional functional section to a vacuum processing section for performing a semiconductor process. The term "semiconductor process" used herein includes various kinds of processes which are performed to manufacture a semiconductor device or a structure having wiring layers, electrodes, and the like to be connected to a semiconductor device, on a target substrate, such as a semiconductor wafer or an LCD substrate, by forming semiconductor layers, insulating layers, and conductive layers in predetermined patterns on the target substrate.

In a conventional typical semiconductor processing system, vacuum processing units are individually completed. In other words, a vacuum unit for performing a first processing step or steps is independent of a vacuum unit for performing a second processing step or steps. When a small number of wafers, such as trial products, which need a large number of processing steps are produced, a plurality of, for example, two vacuum processing units may be required. In this case, wafers that have been processed in a first vacuum processing unit are transferred to a second vacuum processing unit by a driverless cart. For this reason, the following problems occur.
 
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