Vertical dual loadlock chamber

5909994
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Inventors

Blum, Rick
Fairbairn, Kevin
Lane, Christopher

Application #

749611

Filed

Nov-18-1996

Published

Jun-8-1999

Current US Class

118/719
414/217
414/331.01
414/416.03
414/937
414/939

International Classes

B65G 001/10

Field of Search

414/416 414/417 414/222 414/225 414/331 414/935 414/937 414/938 414/939 414/940 414/941 204/298.25 118/719

Assignee

Applied Materials, Inc. (Santa Clara, CA)

Examiners

Werner; Frank E.

Attorney, Agent or Firm

Patterson & Associates

US Patent References

4775281   Apparatus and met...
4785962   Vacuum chamber...
4819167   System and method...
4923584   Sealing apparatus...
4962726   Chemical vapor de...
5120019   Valve
5133284   Gas-based backsid...
5226632   Slit valve apparatu...
5275303   Valve closure mech...
5292393   Multichamber inte...
5302209   Apparatus for man...
5363872   Low particulate slit...
5372471   Single semiconduct...
5388944   Vertical heat-treatin...
5391035   Micro-enviroment l...
5469035   Two-axis magnetic...
5494494   Integrated module...
5505779   Integrated module...
5562383   Treatment apparatus
5674039   System for transferr...
 

Referenced by:

View Backward References

Other References

Z. Shiller and S. Dubowski, "Robot Path Planning with Obstacles, Actuator, Gripper, and Payload Constraints," International Journal of Robotics Research, vol. 8, No. 6, Dec. 1989, pp. 3-18. Z. Shiller and H.H. Lu, "Computation of Path Constrained Time Optimal Motions With Dynamic Singularities," Transactions of the ASME, Journal of Dynamic Systems, Measurement, and Control, vol. 114, Mar. 1992, pp. 34-40. Mattson Brochure. U.S. application No. 08/751,485, Maydan et al., filed Nov. 18, 1996. U.S. application No. 08/751,524, Fairbairn et al., filed Nov.18, 1996. U.S. application No. 08/752,463, Altwood et al., filed Nov. 18, 1996. U.S. application No. 08/752,471, Fairbairn et al., filed Nov. 18, 1996. U.S. application No. 08/749,614, Sunder, filed Nov. 18, 1996. U.S. application No. 08/749,612, Fairbairn et al., filed Nov. 18, 1996. U.S. application No. 08/752,462, Lane et al., filed Nov. 18, 1996. U.S. application No. 08/749,613, Fairbairn et al., filed Nov. 18, 1996. U.S. application No. 08/751,484, Fairbairn et al., filed Nov. 18, 1996. U.S. application No. 08/751,486, Fairbairn et al., filed Nov. 18, 1996. U.S. application No. 08/746,859, Kroeker, Nov. 18, 1996. Novellus Brochure.

Citation

Cite This Patent

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Abstract
A vacuum loadlock is provided for housing a pair of wafers in proper alignment for concurrent processing. In one embodiment, a single chamber loadlock is provided with a gas diffuser disposed therein to decrease venting times within the loadlock. In another embodiment, a dual chamber loadlock is provided having first and second isolatable regions disposed adjacent a transfer region to increase throughput of the system.
 
Claims
What is claimed is:

1. An apparatus for loading wafers into a processing system, comprising:

(a) a chamber disposed adjacent to the processing system, the chamber comprising:

(i) an enclosure;

(ii) a transfer region which communicates between the enclosure and the processing system through an aperture formed in a sidewall of the chamber;

(iii) a first and second loading/unloading port formed in the sidewall of the chamber; and

(iv) one or more exhaust ports;

(b) a first and a second isolatable compartment movably disposed in the chamber, each compartment positionable in communication with the aperture while the other compartment is in communication with one of the loading/unloading ports, each compartment comprising:



Description
FIELD OF THE INVENTION

The present invention relates to a method and apparatus, including a system and individual system components, for concurrent processing of multiple wafers in the fabrication of integrated circuits. More particularly, the present invention provides a staged vacuum system having one or more process chambers which share one or more utilities, one or more loadlock chambers and a transfer chamber connected to both the loadlock chambers and the process chambers.

BACKGROUND OF THE RELATED ART

The term "cluster tool" generally refers to a modular, multichamber, integrated processing system having a central wafer handling module and a number of peripheral process chambers. Cluster tools have become generally accepted as effective and efficient equipment for manufacturing advanced microelectronic devices. Wafers are introduced into a cluster tool where they undergo a series of process steps sequentially in various process chambers to form integrated circuits. The transfer of the wafers between the process chambers is typically managed by a wafer handling module located in a central transfer region. Typically, cluster tools are of two different types: single wafer processing or batch wafer processing. Single wafer processing generally refers to a chamber configuration in which a single wafer is located for processing. Batch wafer processing generally refers to a chamber configuration in which multiple wafers are positioned on a turntable and are processed at various positions within the chamber as the turntable rotates through 360.degree.. A cluster tool configured for batch processing allows multiple wafers, typically from four (4) to seven (7) wafers, to be simultaneously processed in a single chamber.